AI Hardware Summit attendees are invited to attend the an extended networking session where they can meet attendees from across both events. The Meet & Greet is a perfect opportunity to reconnect with peers, expand your network, and discuss the state of ML across the cloud-edge continuum!
Chip Design
Developer Efficiency
Edge AI
Enterprise AI
ML at Scale
NLP
Novel AI Hardware
Systems Design
Data Science
Hardware Engineering
Software Engineering
Strategy
Systems Engineering
Colin Murdoch
Chief Business Officer
DeepMind
Decades of international commercial experience and deep technical expertise mean Colin is uniquely placed to ensure DeepMind’s cutting-edge research benefits as many people as possible. As Chief Business Officer of DeepMind, he oversees a wide-range of teams including Applied, which applies research breakthroughs to Google products and infrastructure used by billions of people. He also helps drive the growth of DeepMind, building and leading critical functions including finance and strategy and leading external and commercial partnerships. Originally an electronics and software engineer, he has held senior positions at both start-ups and global companies such as Thomson Reuters, helping them solve their own complex, mission-critical, real-world challenges.
Cade Metz
Technology Correspondent
New York Times
Cade Metz is a reporter with The New York Times, covering artificial intelligence, driverless cars, robotics, virtual reality, and other emerging areas. Genius Makers is his first book. Previously, he was a senior staff writer with Wired magazine and the U.S. editor of The Register, one of Britain’s leading science and technology news sites.
A native of North Carolina and a graduate of Duke University, Metz, 48, works in The New York Times’ San Francisco bureau and lives across the bay with his wife Taylor and two daughters.
AMD
Website: https://www.amd.com/en
For more than 50 years AMD has driven innovation in high-performance computing, graphics and visualization technologies. Billions of people, leading Fortune 500 businesses and cutting-edge scientific research institutions around the world rely on AMD technology daily to improve how they live, work and play. AMD employees are focused on building leadership high-performance and adaptive products that push the boundaries of what is possible. For more information about how AMD is enabling today and inspiring tomorrow, visit the AMD (NASDAQ: AMD) website, blog, Facebook and Twitter pages.
Graphcore's Intelligence Processing Unit (IPU), built on its unique wafer-on-wafer technology architecture, enables innovators across all industries to undertake breakthrough research with the power of AI compute. To deliver what Graphcore believes will be the standard for machine intelligence compute, it follows a continuous integration (CI) and continuous delivery (CD) process to ensure incremental code changes are delivered quickly and reliably to production. In this workshop, Graphcore will share how it’s using Synopsys formal verification solutions throughout the CI/CD process to deliver bug-free silicon. Workshop topics include:
- An introduction to Sequential Equivalence Checking (SEQ) and Formal Testbench Analyzer (FTA) applications, part of Synopsys VC Formal
- Graphcore’s formal verification deployment to maximize engineering productivity
- How formal is modified for CI and CD
- Strategies Graphcore employed to overcome reproducibility challenges at the CI stage
Hardware Engineer workshop are restricted to hardware engineers and architects, and software designers from companies interested in learning how to design and deploy ML onto hardware platforms.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a hardware or software engineer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Chip Design
Novel AI Hardware
Systems Design
Hardware Engineering
Systems Engineering
Manish Pandey
Fellow & VP, R&D
Synopsys
Manish Pandey is Vice President R&D and Fellow at Synopsys, and an Adjunct Professor at Carnegie Mellon University. He completed his PhD in Computer Science from Carnegie Mellon University and a B. Tech. in Computer Science from the Indian Institute of Technology Kharagpur. He currently leads the R&D teams for formal and static technologies, and machine learning at Synopsys. He previously led the development of several static and formal verification technologies at Verplex and Cadence which are in widespread use in the industry. Manish has been the recipient of the IEEE Transaction in CAD Outstanding Young author award and holds over two dozen patents and refereed publications.
Anthony Wood
Formal Verification Lead
Graphcore
Anthony has held a number of a design and verification roles working on CPUs, GPUs and IPUs at Infineon, Xmos, Imagination and Graphcore. At Imagination he was head of verification for the high-end GPU cores. At Graphcore his responsibilities include leveraging formal verification techniques throughout the silicon team; reducing delivery timescales through Continuous Delivery; and working to ensure verification disciplines are adopted for DFT. He strives to find ways of improving the productivity of silicon engineers and of course he agonises about potential verification holes.
Synopsys
Website: https://www.synopsys.com/
Smart, Secure Everything—From Silicon to Software
Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
State-of-the-art large language models (LLMs) are empowering organizations to unlock the most critical insights in their unstructured data. Despite the opportunities, the cost and complexity of developing these models internally makes them impractical for most organizations to develop on their own. SambaNova overcomes these challenges with production-ready, pre-trained LLMs delivered through a full-stack solution, which can be further adapted through unlimited fine-tuning or pre-training within an organization’s own environment. In this workshop, we will showcase prototyping solutions for enterprise semantic search, legal compliance analysis, and call center service analysis, built on top of pretrained LLMs available through SambaNova Dataflow-as-a-Service. This is followed by live trials on the demo to showcase the exciting potential of large language models.
Developer workshops are restricted to machine learning practitioners from research institutions and enterprises who are interested in learning how to port code onto novel AI platforms and want to get hands-on access to hardware and SDKs.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a machine learning engineer / AI application developer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Developer Efficiency
NLP
Novel AI Hardware
Data Science
Software Engineering
Jian Zhang
Director, Machine Learning
SambaNova Systems
SambaNova
Website: https://www.sambanovasystems.com/
We are a computing startup focused on building the industry’s most advanced systems platform to run AI applications from the datacenter to the edge.
Deploying a neural network on an embedded solution requires more than compiling a trained model. Join us to discuss the IP and tooling available from Cadence that allow architects to start with a neural network model, run through quantization and partitioning mapping to a configurable embedded target, simulating the design to get performance data (both cycle and energy), and iterating through design optimizations to reach an optimal implementation. Our experts will give a technical walkthrough of the tools, features, supported frameworks, and infrastructure available to both software and silicon designers.
Hardware Engineer workshop are restricted to hardware engineers and architects, and software designers from companies interested in learning how to design and deploy ML onto hardware platforms.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a hardware or software engineer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Chip Design
Edge AI
Novel AI Hardware
Hardware Engineering
Ade Bamidele
Design Engineering Architect
Cadence Design Systems
Ade is an Architect in the Tensilica Central Applications Team. Ade focuses on the optimization and acceleration of imaging and vision algorithms on Vision and AI DSP and engines. He has over 15 years of experience in the R&D and optimization of computer vision and pattern recognition algorithms on vision and embedded devices. Ade graduated from University College London in 2006 with a Doctoral in Electronics Engineering and Thesis focusing on Computational Visual Attention.
Michael Hubrig
Sr Design Engineering Architect
Cadence Design Systems
Michael is Sr. Architect in the Tensilica Central Applications Team. His team provides deep technical support for Vision and AI DSP and engines. Michael has 20 years of experience porting imaging and vision algorithms to DSP platforms.
Rohan Darole
Sr Principal Design Engineer
Cadence Design Systems
Rohan Darole is a ML Product Specialist at Cadence TIP (Tensilica IP Group). He received his Master’s in Computer Science from SUNY-UB, Buffalo, NY. Rohan is leading a team of application engineers responsible for definition, realization, and customer engagements of Tensilica AI MAX Product Family. Previously he has worked on CV/ML Acceleration with Vision DSPs, Imaging (ISP) & Video Codecs SW Development.
Cadence
Website: https://www.cadence.com/en_US/home.html
Cadence’s goal is to empower engineers at semiconductor and systems companies to create innovative, intelligent, and highly differentiated electronic products that transform the way people live, work, and play. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to systems—in AI, IoT, mobile, 5G, consumer, cloud, data center, automotive, aerospace, and other market segments. Cadence offers specialized IP with industry-leading performance, power efficiency, and interconnects, as well as AI-specific verification and implementation solutions. The company also employs machine learning within its tools and solutions to enable the best power, performance, and area (PPA), quality of results (QoR), and time-to-market (TTM) benefits.
During this workshop, attendees will be updated on the state of the art in computer vision use cases and learn how to build deep learning models for object detection, while improving model performance. Atos' expert host will provide best practices on team organization to facilitate success. Finally, attendees will learn how to implement an engineering strategy - build a project template & data versioning, experiment tracking & feedback, leverage testing & boost model promotion.
Developer workshops are restricted to machine learning practitioners from research institutions and enterprises who are interested in learning how to port code onto novel AI platforms and want to get hands-on access to hardware and SDKs.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a machine learning engineer / AI application developer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Developer Efficiency
Edge AI
Novel AI Hardware
Data Science
Software Engineering
Ashwin Sakhare
Senior Data Scientist, Atos zData
Atos
Ashwin Sakhare, PhD is a Senior Data Scientist at Atos zData, a leading AI and Data Science firm. Ashwin leverages over a decade of industry and research experience to solve key business challenges through novel product development and data-driven machine learning approaches. He is a computer vision expert and has delivered AI and machine vision solutions to clients across a broad range of application domains. He has a strong healthcare industry background, where he led the ideation, design, and development of AI products. Ashwin holds a BS in Biomedical Engineering from North Carolina State University and a MS and PhD in Biomedical Engineering from the University of Southern California.
Atos
Website: https://atos.net/thinkai
Atos is a global leader in digital transformation with 109,000 employees and annual revenue of c. € 11 billion. European number one in cybersecurity, cloud and high performance computing, the Group provides tailored end-to-end solutions for all industries in 71 countries. A pioneer in decarbonization services and products, Atos is committed to a secure and decarbonized digital for its clients. Atos is a SE (Societas Europaea), listed on Euronext Paris and included in the CAC 40 ESG and Next 20 Paris Stock indexes.
The purpose of Atos is to help design the future of the information space. Its expertise and services support the development of knowledge, education and research in a multicultural approach and contribute to the development of scientific and technological excellence. Across the world, the Group enables its customers and employees, and members of societies at large to live, work and develop sustainably, in a safe and secure information space.
Developer workshops are restricted to machine learning practitioners from research institutions and enterprises who are interested in learning how to port code onto novel AI platforms and want to get hands-on access to hardware and SDKs.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a machine learning engineer / AI application developer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Developer Efficiency
Novel AI Hardware
Data Science
Software Engineering
Host
Jeff Boudier
Product Director
Hugging Face
Jeff Boudier is a product director at Hugging Face, creator of Transformers, the leading open-source NLP library. Previously Jeff was a co-founder of Stupeflix, acquired by GoPro, where he served as director of Product Management, Product Marketing, Business Development and Corporate Development.
Régis Pierrard
Machine Learning Engineer
HuggingFace
Philipp Schmid
Tech Lead
HuggingFace
Habana
Website: https://habana.ai/
Habana is an AI solutions semiconductor company. Eitan is Habana’s Chief Business Officer and will share with us Habana’s vision of the AI/Deep-learning processing needs and Habana’s solutions.
Using Hugging Face Optimum, we will show how easy it is to run and accelerate an end-to-end state-of-the-art Transformer model workflow on IPUs. We’ll provide a demo to fine-tune a BERT-Large Transformer model in IPUs using Hugging Face Optimum, and then serve the model using the inference API. Join us as we look under the hood of our Intelligence Processing Unit to see how our unique architecture, combined with Optimum’s simple plug-and-play experience, enables faster performance on today’s most popular ML models. By the end of the talk, we would like you to have a better understanding of the wide range of off-the-shelf NLP & Computer Vision Transformer models through our integration with the Hugging Face ecosystem. Plus, how to access this walkthrough by using our free IPU runtimes in the cloud.
Developer workshops are restricted to machine learning practitioners from research institutions and enterprises who are interested in learning how to port code onto novel AI platforms and want to get hands-on access to hardware and SDKs.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a machine learning engineer / AI application developer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Developer Efficiency
Novel AI Hardware
Data Science
Software Engineering
Host
Jeff Boudier
Product Director
Hugging Face
Jeff Boudier is a product director at Hugging Face, creator of Transformers, the leading open-source NLP library. Previously Jeff was a co-founder of Stupeflix, acquired by GoPro, where he served as director of Product Management, Product Marketing, Business Development and Corporate Development.
Régis Pierrard
Machine Learning Engineer
HuggingFace
Philipp Schmid
Tech Lead
HuggingFace
Tim Santos
Developer Relations Director
Graphcore
Tim is leading the Developer Relations in Graphcore to help the AI & ML community achieve maximum success with IPUs and make the next breakthroughs in machine intelligence. Tim has worn many developer hats in his career, from being a research engineer, data scientist and leading MLOps teams. Along the way, he’s gained experience across all stages of the development lifecycle taking AI applications from experimentation to deployment. If you’re looking to try out IPUs, learn more about our Poplar SDK and tools, showcase your innovations, connect with the community, request educational resources, or provide feedback on our technology, then Tim is your champion.
Graphcore
Website: https://www.graphcore.ai/
We’re optimistic for a future where people live healthier, more informed, more creative lives. We see a world where technology enhances human potential, and takes us into a new era of intelligence and progress that everyone can benefit from.
We let innovators create the next breakthroughs in machine intelligence.
We believe our Intelligence Processing Unit (IPU) technology will become the worldwide standard for machine intelligence compute. The Graphcore IPU is going to be transformative across all industries whether you are a medical researcher, roboticist or building autonomous cars.
We have created a completely new processor, the IPU, specifically designed for AI compute. The IPU’s unique architecture lets AI researchers undertake entirely new types of work, not possible using current technologies, to drive the next advances in machine intelligence.
Developer workshops are restricted to machine learning practitioners from research institutions and enterprises who are interested in learning how to port code onto novel AI platforms and want to get hands-on access to hardware and SDKs.
Workshops are application only and subject to eligibility and availability. The workshops are free, and lunch, shared networking sessions, and access to the Meet and Greet function and keynote is included in the developer pass. If you're a machine learning engineer / AI application developer, please apply using the form in the registration section of the website or by emailing [email protected]. There are approximately 30 spaces available.
Developer Efficiency
Edge AI
Enterprise AI
ML at Scale
Data Science
Software Engineering
Jeff Boudier
Product Director
Hugging Face
Jeff Boudier is a product director at Hugging Face, creator of Transformers, the leading open-source NLP library. Previously Jeff was a co-founder of Stupeflix, acquired by GoPro, where he served as director of Product Management, Product Marketing, Business Development and Corporate Development.
Régis Pierrard
Machine Learning Engineer
HuggingFace
Philipp Schmid
Tech Lead
HuggingFace