Enterprise AI
ML at Scale
Systems Design
Data Science
Software Engineering
Strategy
Systems Engineering
Hilary Jones
Senior Director Legal Pharmaceutical Regulation
BioNTech
Chip Design
ML at Scale
Novel AI Hardware
Systems Design
Hardware Engineering
Strategy
Systems Engineering
Nitza Basoco
VP, Business Development
proteanTecs
Nitza Basoco is a technology leader with over 20 years of semiconductor experience. At proteanTecs, she leads the Business Development team, responsible for driving partnership strategies and building value-add ecosystem growth.
Previously, Nitza was the VP of Operations at Synaptics with responsibility for growing and scaling their worldwide test development, product engineering and manufacturing departments. Prior to Synaptics, Nitza spent a decade holding various leadership positions within the operations organization at MaxLinear, ranging from test development engineering to supply chain. Earlier in her career, Nitza served as a Principal Test Development Engineer for Broadcom Corporation and as a Broadband Applications Engineer at Teradyne.
Nitza holds MEng and BSEE degrees from Massachusetts Institute of Technology.
Judy Priest
Distinguished Engineer & VP, GM
Microsoft
Judy Priest is a Distinguished Engineer in Microsoft's Cloud and AI Group. She drives innovation, integration, and operations in next generation Data Center platforms supporting Azure, AI, and MS's Enterprise software. Judy has over 25 years of experience in developing data centers systems and silicon, high speed signaling technologies and optics, circuit design, and physical architectures for compute, storage, graphics, and networking.
Judy has previously worked at Cisco Systems, Silicon Graphics, Hewlett-Packard, and Digital Equipment Corporation, as well as two startup ventures. She serves on the Board of Directors for Women's Audio Mission, a local SF nonprofit moving the needle for girls, women, and GNC individuals in STEM through music. Judy was awarded Business Insider's 2018 Most Powerful Female Engineers and InterCon Networking's 2020 Top 100 Leaders in Engineering.
Shivam Bharuka
Software Production Engineer
Meta
Shivam is an engineering leader with Meta as part of the AI Infrastructure team for the last three years. During this time, he has helped scale the machine learning training infrastructure at Meta to support large scale ranking and recommendation models, serving more than a billion users. He is responsible for driving performance, reliability, and efficiency-oriented designs across the components of the ML training stack at Meta. Shivam holds a B.S. and an M.S. in Computer Engineering from the University of Illinois at Urbana-Champaign.
Jim von Bergen
Senior Director, Product Quality Engineering
Cisco
proteanTecs
Website: https://www.proteantecs.com/
proteanTecs is the leading provider of deep data analytics for advanced electronics monitoring. Trusted by global leaders in the datacenter, automotive, communications and mobile markets, the company provides system health and performance monitoring, from production to the field. By applying machine learning to novel data created by on-chip monitors, the company's deep data analytics solutions deliver unparalleled visibility and actionable insights—leading to new levels of quality and reliability. Founded in 2017 and backed by world-leading investors, the company is headquartered in Israel and has offices in the United States, India and Taiwan. For more information, visit www.proteanTecs.com.
Enterprise AI
ML at Scale
Systems Design
Data Science
Software Engineering
Strategy
Systems Engineering
Daniel Wu
Strategic AI Leadership | Keynote Speaker | Educator | Entrepreneur Course Facilitator
Stanford University AI Professional Program
Daniel Wu is an accomplished technical leader with over 20 years of expertise in software engineering, AI/ML, and team development. With a diverse career spanning technology, education, finance, and healthcare, he is credited for establishing high-performing AI teams, pioneering point-of-care expert systems, co-founding a successful online personal finance marketplace, and leading the development of an innovative online real estate brokerage platform. Passionate about technology democratization and ethical AI practices, Daniel actively promotes these principles through involvement in computer science and AI/ML education programs. A sought-after speaker, he shares insights and experiences at international conferences and corporate events. Daniel holds a computer science degree from Stanford University.
Approximately one year ago, Samsung confirmed the world’s first use of AI to design a mobile processor chip. Since then, AI-driven design has been adopted across the industry at a phenomenal pace, accelerating silicon innovations to market in automotive, high-performance computing, consumer electronics, and other applications. Will this pace of innovation ultimately lead to self-designed silicon? In this sequel to the Day-1 Keynote – Enter the Era of Autonomous Design: Personalizing Chips for 1,000X More Powerful AI Compute, we will be looking at real-world examples of using AI to design chips, and reporting on the industry’s path to autonomous design.
Chip Design
Novel AI Hardware
Hardware Engineering
Industry & Investment
Stelios Diamantidis
Senior Director & Head of Autonomous Design Solutions
Synopsys
Stelios heads Synopsys' AI Solutions team in the Office of the President, where he researches and applies innovative machine-learning technology to address systemic complexity in the design and manufacturing of integrated computational systems. In 2020, Stelios launched DSO.ai™, the world’s first autonomous AI application for chip design. He has more than 20 years of experience in chip design and EDA software and has founded two companies in this space. Stelios holds an M.S. Electrical Engineering from Stanford University, California.
Synopsys
Website: https://www.synopsys.com/
Smart, Secure Everything—From Silicon to Software
Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
Edge AI
Enterprise AI
ML at Scale
Novel AI Hardware
Systems Design
Data Science
Software Engineering
Systems Engineering
Girish Venkataramani
Senior Director, ML Accelerators
Cruise
Ravi Narayanaswami
Principal MLA Architect
Cruise
Prasun Raha
Head of HW Platform Architecture
Rivian
Nikunj Kotecha
Solutions Architect
BrainChip
Nikunj Kotecha is a Machine Learning Solutions Architect at BrainChip Inc. Currently, he works on developing and optimizing Machine Learning algorithms for the AkidaTM neuromorphic hardware. He also demonstrating capabilities of AkidaTM to client and supports with their neuromorphic solutions for AkidaTM. He has a Master of Science in Computer Science, where he specialized in concepts of Artificial intelligence with Deep Learning algorithms. At the time, he was a part of the Machine Learning lab and has published technical papers, supported research into different avenues of AI. He published research on Cross-Modal Fusion with Transformer architecture for Sign Language translation during the completion of his Masters. He has also worked at Oracle, where he build and integrated Machine Learning solutions to provide operational benefits of using Oracle Clinical Trial software.
David Tai
Senior Staff Engineer
DiDi Autonomous Driving
The relentless growth in the size and sophistication of AI models and data sets continues to put pressure on every aspect of AI processing systems. Advances in domain-specific architectures and hardware/software co-design have resulted in enormous increases in AI processing performance, but the industry needs even more. Memory systems and interconnects that supply data to AI processors will continue to be of critical importance, requiring additional innovation to meet the needs of future processors. Join Rambus Fellow and Distinguished Inventor, Dr. Steven Woo, as he leads a panel of technology experts in discussing the importance of improving memory and interfaces and enabling new system architectures, in the quest for greater AI/ML performance.
Chip Design
Enterprise AI
ML at Scale
Novel AI Hardware
Systems Design
Hardware Engineering
Strategy
Systems Engineering
Steven Woo
Fellow and Distinguished Inventor
Rambus
I was drawn to Rambus to focus on cutting edge computing technologies. Throughout my 15+ year career, I’ve helped invent, create and develop means of driving and extending performance in both hardware and software solutions. At Rambus, we are solving challenges that are completely new to the industry and occur as a response to deployments that are highly sophisticated and advanced.
As an inventor, I find myself approaching a challenge like a room filled with 100,000 pieces of a puzzle where it is my job to figure out how they all go together – without knowing what it is supposed to look like in the end. For me, the job of finishing the puzzle is as enjoyable as the actual process of coming up with a new, innovative solution.
For example, RDRAM®, our first mainstream memory architecture, implemented in hundreds of millions of consumer, computing and networking products from leading electronics companies including Cisco, Dell, Hitachi, HP, Intel, etc. We did a lot of novel things that required inventiveness – we pushed the envelope and created state of the art performance without making actual changes to the infrastructure.
I’m excited about the new opportunities as computing is becoming more and more pervasive in our everyday lives. With a world full of data, my job and my fellow inventors’ job will be to stay curious, maintain an inquisitive approach and create solutions that are technologically superior and that seamlessly intertwine with our daily lives.
After an inspiring work day at Rambus, I enjoy spending time with my family, being outdoors, swimming, and reading.
Education
- Ph.D., Electrical Engineering, Stanford University
- M.S. Electrical Engineering, Stanford University
- Master of Engineering, Harvey Mudd College
- B.S. Engineering, Harvey Mudd College
Euicheol Lim
Research Fellow, System Architect
SK Hynix
Eui-cheol Lim is a Research Fellow and leader of Solution Advanced Technology team in SK Hynix. He received the B.S. degree and the M.S. degree from Yonsei University, Seoul, Korea, in 1993 and 1995, and the Ph.D. degree from Sungkyunkwan University, suwon, Korea in 2006. Dr.Lim joined SK Hynix in 2016 as a system architect in memory system R&D. Before joining SK Hynix, he had been working as an SoC architect in Samsung Electronics and leading the architecture of most Exynos mobile SoC. His recent interesting points are memory and storage system architecture with new media memory and new memory solution such as CXL memory and Processing in Memory. In particular, he is proposing a new computing architecture based on PIM, which is more efficient and flexible than existing AI accelerators, to process generative AI and LLM (large language Model) that is currently causing a sensation.
Sumti Jairath
Chief Architect
SambaNova Systems
Sumti Jairath is Chief Architect at SambaNova Systems, with expertise in hardware-software co-design. Sumti worked on PA-RISC-based Superdome servers back at HP, followed by several generations of SPARC CMT processors at Sun Microsystems and Oracle. At Oracle, Sumti worked on SQL, Data-analytics and Machine Learning acceleration in SPARC processors. Sumti holds 27 patents in computer architecture and hardware-software co-design.
Matt Fyles
SVP, Software
Graphcore
Matt Fyles is a computer scientist with over 20 years of proven experience in the design, delivery and the support of software and hardware within the microprocessor market. As SVP Software at Graphcore, Matt has built the company’s Poplar software stack from scratch, co-designed with the IPU for machine intelligence. He currently oversees the Software team’s work on the Poplar SDK, helping to support Graphcore’s growing community of developers.
Rambus
Website: https://www.rambus.com/
Rambus is a provider of industry-leading chips and silicon IP making data faster and safer. With over 30 years of advanced semiconductor experience, we are a pioneer in high-performance memory subsystems that solve the bottleneck between memory and processing for data-intensive systems. Whether in the cloud, at the edge or in your hand, real-time and immersive applications depend on data throughput and integrity. Rambus products and innovations deliver the increased bandwidth, capacity and security required to meet the world’s data needs and drive ever-greater end-user experiences. For more information, visit rambus.com.
Enterprise AI
ML at Scale
Data Science
Software Engineering
Strategy
Dr. Caiming Xiong
VP of AI Research and Applied AI
Salesforce
Dr. Caiming Xiong is VP of AI Research and Applied AI at Salesforce. Dr. Xiong holds a Ph.D. from the department of Computer Science and Engineering, University at Buffalo, SUNY and worked as a Postdoctoral Researcher Scholar at the University of California, Los Angeles (UCLA).
We have witnessed a big paradigm shift in how AI has affected our daily lives. While AI model training is typically done in a cloud infrastructure setting, model inferencing has grown enormously on power, area, bandwidth and memory constrained edge devices.
These inferencing workloads have varying computational and memory needs, stringent power and silicon area requirements that can be very challenging to meet. AI led innovation is affecting the next generation of embedded hardware and software design alike. This talk will illustrate the design philosophies and challenges around designing best in class AI hardware accelerators.
Chip Design
Novel AI Hardware
Hardware Engineering
Strategy
Systems Engineering
Sriraman Chari
Fellow & Head of AI Accelerator IP Solution
Cadence Design Systems
In developing applications for a variety of different infrastructure and hardware targets, machine learning developers face a dynamic and uncertain landscape where optimization and interoperability become challenging tasks.
This panel will address how to build infrastructure with developer efficiency in mind, so that developers can focus on creating game-changing machine learning solutions for organizations and consumers. It will also address how hardware, systems and other technology vendors can assist in this effort.
Developer Efficiency
Enterprise AI
ML at Scale
Systems Design
Data Science
Software Engineering
Strategy
Systems Engineering
Ritu Goel
Director, Product Management, Adobe Sensei
Adobe
Ritu Goel is Director of Product Management at Adobe, where she has been driving strategy for AI/ML platform since its early days with the vision of democratizing AI/ML development at Adobe. Prior to this, Ritu has spent more than a decade leading product strategy and execution of various enterprise to consumer products and platforms at eBay, Macys.com and Infosys. Ritu has a bachelor of engineering from Indian Institute of Technology, Roorkee.
Jeff Boudier
Product Director
Hugging Face
Jeff Boudier is a product director at Hugging Face, creator of Transformers, the leading open-source NLP library. Previously Jeff was a co-founder of Stupeflix, acquired by GoPro, where he served as director of Product Management, Product Marketing, Business Development and Corporate Development.
Sree Ganesan
VP of Product
d-Matrix
Sree Ganesan, VP of Product, d-Matrix: Sree is responsible for product management functions and business development efforts across the company. She manages the product lifecycle, definition and translation of customer needs to the product development function, acting as the voice of the customer. Prior, Sree led the Software Product Management effort at Habana Labs/Intel, delivering state-of-the-art deep learning capabilities of the Habana SynapseAI® software suite to the market. Previously, she was Engineering Director in Intel’s AI Products Group, where she was responsible for AI software strategy and deep learning framework integration for Nervana NNP AI accelerators. Sree earned a bachelor’s degree in electrical engineering from the Indian Institute of Technology Madras and a PhD in computer engineering from the University of Cincinnati, Ohio.
Daniel Wu
Strategic AI Leadership | Keynote Speaker | Educator | Entrepreneur Course Facilitator
Stanford University AI Professional Program
Daniel Wu is an accomplished technical leader with over 20 years of expertise in software engineering, AI/ML, and team development. With a diverse career spanning technology, education, finance, and healthcare, he is credited for establishing high-performing AI teams, pioneering point-of-care expert systems, co-founding a successful online personal finance marketplace, and leading the development of an innovative online real estate brokerage platform. Passionate about technology democratization and ethical AI practices, Daniel actively promotes these principles through involvement in computer science and AI/ML education programs. A sought-after speaker, he shares insights and experiences at international conferences and corporate events. Daniel holds a computer science degree from Stanford University.